My research interests are in the field of UML for SoC and Embedded Systems Design.
Conferences addressing this topic are:
- UML for SoC and Embedded Systems Design (a DATE Workshop)
- UML-SoC (a DAC Workshop)
- Forum on specification and Design Languages (FDL)
Below are Master's projects that I'm currently supervising at the Advanced Learning and Research Institute (ALaRI):
High Level Design through UML profiles (October 2008-July 2010)
Goal of this project is to analyse the gap between UML profiles and HW/SW Codesign. In particular the gaps between SysML/MARTE and Design Space Exploration, SysML/MARTE and Model Verification, and between SysML/MARTE and SystemC code generation should be analysed. Possible solutions in order to fill these gaps should be proposed and a demo that solves these kinds of problems should be implemented.
(in collaboration with Ioannis Argyris, MSc student at ALaRI; Marcello Mura, PhD student at ALaRI)
